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Design Through Verilog HDL
Padmanabhan, T.R · IEEE Press , 2004
- Publisher
- IEEE Press , 2004
- ISBN
- 0471441481
- Dewey classification
- 621.392
- Language
- English
Digital copy
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Catalogue record
| Field | Value |
|---|---|
| 001Control number | 13751 |
| 003Control number identifier | Thư viện trường Đại học HUTECH |
| 005Date and time of latest transaction | 18 Jul 2016, 13:40 |
| 008Fixed-length data elements | 100302s vn |
| 020International Standard Book Number (ISBN) | 0471441481 |
| 041Language code | eng |
| 082Dewey Decimal call number | 621.392 P101M |
| 100Main entry – personal name | Padmanabhan, T.R. |
| 245Title statement | Design Through Verilog HDL / T.R. Padmanabhan, B. Bala Tripura Sundari |
| 260Publication, distribution, etc. (imprint) | IEEE Press , 2004 |
| 300Physical description | 455 |
| 650Subject added entry – topical term | Verilog (Computer Hardware Description Language) |
| 999Collection | Downloads |
=001 13751=003 Thư viện trường Đại học HUTECH=005 20160718134008.9=008 100302s vn=020 ##$a0471441481=041 0#$aeng=082 ##$a621.392 $bP101M=100 1#$aPadmanabhan, T.R.=245 10$aDesign Through Verilog HDL / $cT.R. Padmanabhan, B. Bala Tripura Sundari=260 ##$bIEEE Press , $c2004=300 ##$a455=650 ##$aVerilog (Computer Hardware Description Language)=LDR 00586nam a2200205 a 4500